100G QSFP28 Passive Direct Attach Copper Twinax Cable

Supply Voltage

Vcc

-0.5

3.6

V

Storage Temperature

TS

-40

85

°C

Relative Humidity

RH

0

85

%

Rx Damage Threshold,per Lane

PRdmg

5.5

dBm

Operating Case Temperature

TC

0

-

+70

°C

Power Supply Voltage

VCC

3.14

3.3

3.47

V

Data rate

103.125

112

Gb/s

Link Distance (OM3)

70

m

Link Distance (OM4)

100

m

Transmitter

Signaling rate per lane

DRPL

25.78125 ± 100 ppm

Gb/s

Differential pk-pk input voltage

tolerance

Vin,dpp

900

mV

Single-ended voltage tolerance

Vin,pp

-0.35

+3.3

V

Module stress input test

Per IEEE 802.3bm

Receiver

Signaling rate per lane

DRPL

25.78125 ± 100 ppm

Gb/s

Differential data output swing

Vout,pp

400

800

mV

Eye width

Ew

0.57

UI

Vertical eye closure

VEC

5.5

dB

Differential termination mismatch

Tm

10

%

Transition time, 20% to 80%

Tr,Tf

12

ps

Transmitter

Signaling rate, each lane

DRpl

Gb/s

25.78125 ±100 ppm

1

Center Wavelengthe

λ

nm

840

850

860

RMS Spectral Width

nm

0.6

Average launch power, each lane

Pavg

dBm

-8.4

2.4

Optical modulation amplitude, each lane (OMA)

OMA

dBm

-6.4

3

Extinction ratio

ER

dB

2

Average Launch Power of OFF

Transmitter, per Lane

RIN

dBm

-30

Encircled Flux

FLX

dBm

>86% at 19 um

<30% at 4.5 um

Optical return loss tolerance

dB

12

Transmitter eye mask {X1, X2, X3, Y1, Y2, Y3}

{0.3,0.38,0.45,0.35,0.41,0.5}

2

Receiver

Receive Rate for Each Lane

DRpl

Gb/s

25.78125 ±100 ppm

3

Four Lane Wavelength Range

λ

nm

840

860

Overload Input Optical Power

Pmax

dBm

3.4

Average Receive Power for Each

Lane

Pin

dBm

-10.3

2.4

4

Receiver Sensitivity(OMA)per lane

Psens

dBm

-5.2

Recevier Reflectance

Rfl

dB

-12

Receiver Eye MaskDefinition {X1, X2, X3, Y1, Y2,Y3}

{0.28,0.5,0.5,0.33,0.33,0.4}

5

Los De-Assert

Pd

dBm

-13

Los Assert

Pa

dBm

-30

Loss Hysteresis

Pd-Pa

dBm

0.5

1

GND

Ground

1

2

Tx2n

CML-I

Transmitter Inverted Data Input

10

3

Tx2p

CML-I

Transmitter Non-Inverted Data Input

10

4

GND

Ground

1

5

Tx4n

CML-I

Transmitter Inverted Data Input

10

6

Tx4p

CML-I

Transmitter Non-Inverted Data Input

10

7

GND

Ground

1

8

ModSelL

LVTTL-I

Module Select

3

9

ResetL

LVTTL-I

Module Reset

4

10

Vcc Rx

+3.3V Power Supply Receiver

2

11

SCL

LVCMOS-I/O

2-wire serial interface clock

5

12

SDA

LVCMOS-I/O

2-wire serial interface data

5

13

GND

Ground

1

14

Rx3p

CML-O

Receiver Non-Inverted Data Output

9

15

Rx3n

CML-O

Receiver Inverted Data Output

9

16

GND

Ground

1

17

Rx1p

CML-O

Receiver Non-Inverted Data Output

9

18

Rx1n

CML-O

Receiver Inverted Data Output

9

19

GND

Ground

1

20

GND

Ground

1

21

Rx2n

CML-O

Receiver Inverted Data Output

9

22

Rx2p

CML-O

Receiver Non-Inverted Data Output

9

23

GND

Ground

1

24

Rx4n

CML-O

Receiver Inverted Data Output

9

25

Rx4p

CML-O

Receiver Non-Inverted Data Output

9

26

GND

Ground

1

27

ModPrsL

LVTTL-O

Module Present

6

28

IntL

LVTTL-O

Interrupt

7

29

Vcc Tx

+3.3V Power supply transmitter

2

30

Vcc1

+3.3V Power supply

2

31

LPMode

LVTTL-I

Low Power Mode

8

32

GND

Ground

1

33

Tx3p

CML-I

Transmitter Non-Inverted Data Input

10

34

Tx3n

CML-I

Transmitter Inverted Data Input

10

35

GND

Ground

1

36

Tx1p

CML-I

Transmitter Non-Inverted Data

37

Tx1n

CML-I

Transmitter Inverted Data Input

10

38

GND

Ground

1

1

RX0

2

RX1

3

RX2

4

RX3

5678

Not used

9

TX3

10

TX2

11

TX1

12

TX0

FOCC-QSFP28-100G-SR4

QSFP28 SR4 100m OM4, 0~70℃, with DDM